Synergy Quantum’s RISC-V IP push targets quantum-safe SoCs

Synergy Quantum has announced quantum-safe silicon IP cores for RISC-V SoCs.

Synergy Quantum’s new portfolio is aimed at chip teams that want post-quantum protection built into silicon, not added later. The announcement matters because RISC-V adoption is already broad and the security transition has to happen before quantum attacks become practical.

Item	Focus	Best fit
Quantum-safe silicon IP cores	Post-quantum security in hardware	SoC teams planning new designs
RISC-V-based SoCs	Open processor architecture	Processor developers and integrators
Equipment manufacturers	Embedded security integration	Device makers needing hardware trust
Semiconductor companies	Reusable silicon blocks	Faster secure product roadmaps

1. Quantum-safe silicon IP cores

The core announcement is a portfolio of silicon IP designed for quantum-safe security. In plain terms, Synergy Quantum is packaging cryptographic building blocks that can be inserted into chip designs so protection starts at the hardware layer.

This is the kind of move that matters most for long-life devices, where security updates are hard and the chip may need to stay trustworthy for years. It also gives design teams a way to plan for future threats without waiting for a full platform refresh.

• Built for integration into silicon, not just software stacks
• Aimed at post-quantum security requirements
• Useful for new SoCs and next-gen embedded devices

2. RISC-V-based SoCs

The portfolio is targeted at RISC-V-based system-on-chip designs. That is important because RISC-V has become a favored architecture for teams that want more control over their processor roadmap and custom feature set.

For those teams, adding a quantum-safe IP block can be a cleaner path than bolting security onto a finished design. It keeps the security work closer to the processor and can reduce the number of places where sensitive logic has to be managed separately.

• Fits custom processor and SoC development flows
• Supports hardware-first security planning
• Appeals to teams building differentiated silicon

3. Semiconductor company integration

Semiconductor companies are one of the main audiences named in the announcement. For them, reusable IP is attractive because it can shorten design cycles and help standardize security features across product lines.

Instead of creating a bespoke security subsystem for every chip, a company can evaluate a prebuilt core and adapt it to its roadmap. That can be especially useful when multiple devices need a similar trust model but serve different performance or power targets.

Typical integration goals: - Add quantum-safe cryptography to new silicon - Reuse one security block across multiple products - Reduce custom security design effort

4. Processor developer use cases

Processor developers are another clear target for the portfolio. They often need to balance instruction-set choices, performance goals, and security features while keeping area and power in check. A silicon IP core gives them a modular way to add security without reshaping the whole processor plan.

That modularity matters because processor roadmaps move slowly once tape-out decisions are locked. If quantum-safe support is part of the core design conversation, the team can avoid expensive retrofits later.

• Helps keep security aligned with processor architecture
• Can be evaluated during early design stages
• May reduce the need for later hardware rework

5. Equipment manufacturers and embedded trust

Equipment manufacturers often care less about chip branding and more about whether the device can authenticate, protect keys, and resist tampering. Quantum-safe silicon IP gives them a path to stronger embedded trust inside products that may sit in the field for a long time.

That makes the announcement relevant beyond semiconductors. Any manufacturer shipping connected hardware, industrial devices, or infrastructure equipment has an interest in security primitives that are difficult to remove or bypass.

• Useful for connected devices with long service lives
• Supports hardware-rooted trust models
• Matches the needs of industrial and infrastructure equipment

How to decide

If you are a semiconductor company, start with the quantum-safe IP core that best fits your existing SoC flow. If you are a processor developer, focus on how the security block fits area, power, and architecture constraints. If you are an equipment maker, the main question is whether the core helps you build trust into the device from the start.

For most teams, the right choice is the one that reduces redesign risk while giving them a credible post-quantum security story. Synergy Quantum’s announcement is aimed at exactly that gap: making quantum-safe protection part of the silicon plan, not an afterthought.